This talk will focus on the concept, prospects and challenges of enabling cooperation among automated/autonomous vehicles through emerging 5G/6G systems, particularly, for the robust environment perception and more resilient control functions in automated driving systems. Also, the implications and realistic requirements of enabling cooperation and some of the practical challenges will be discussed.
Professor Dianati is the Director of Intelligent Vehicles Research and the technical research lead in the area of Networked Intelligent Systems at the Warwick Manufacturing Group (WMG), University of Warwick in the United Kingdom. The focus of his research is on the application of Information and Communication Technologies (ICT) and Artificially Intelligent (AI) for the development of future mobility and transport systems. He has over 29 years of combined industrial and academic experience, with 20 years in various leadership roles in multi-disciplinary collaborative R&D projects. He works closely with the Automotive and ICT industries as the primary application domains of his research. He is also the Co-Director of Warwick's Centre for Doctoral Training on Future Mobility Technologies, training doctoral researchers in the areas of intelligent and electrified mobility systems in collaboration with the experts in the field of electrification from the Department of Engineering of the University of Warwick. In the past, he has served as an associate editor for the IEEE Transactions on Vehicular Technology and several other international journals, including IET Communications, as well as the Guest Editor of several Special Issues of IEEE Transactions on Intelligent Transport System. Currently, he is the Field Chief Editor of Frontiers in Future Transportation.
The advent of high-performance embedded platforms is paving the way towards advanced robotics applications aiming at replacing human activities, integrating complex parallel workloads with safety-critical real-time tasks: self-driving vehicles, vision-based industrial automation, autonomous robots, etc. To guarantee timing and safety requirements of these new challenging systems, new task models and scheduling solutions are needed for properly exploting the heterogenous computing engines available in modern platforms. This talk will motivate the main predictability bottlenecks of such platforms, presenting possible solutions to fully exploit the computing capabilities of high-performance embedded systems in a safe way.
Marko Bertogna is Full Professor and leader of the HiPeRT Lab. His main research interests are in High-Performance Real-Time systems, especially based on multi- and many-core devices, Autonomous Driving and Industrial Automation systems. In 2008, he received a PhD in Computer Sciences from the Scuola Superiore Sant'Anna of Pisa, with a dissertation on Real-Time Systems for Multicore Platforms, awarded as the best scientific PhD thesis of 2008/2009. He has authored more than 100 papers, receiving the 2009 Best Paper Award for the IEEE Transactions on Industrial Informatics, and 9 other Best Paper Awards in first level international conferences. He coordinated multiple EU and industrial projects, securing more than 10 MEuro in funding for his research group. He served in more than 60 program committees of international conferences in embedded and real-time systems, chairing or co-chairing 8 events. He is Senior Member of the IEEE, and Stakeholder Member of HiPEAC. He is CEO and founder of the academic spinoff HiPeRT Srl.
Balancing storage and computing capabilities, accuracy, anomaly detection and modelling design is a real challenge when implementing Artificial Neural Networks on ultra-low power devices such as microcontrollers. Deeply Quantized Neural Networks (DQNNs) offer the most promising solution to these requirements, however, current state-of-the-art microcontrollers are not yet able to exploit its advantages. The design of custom energy efficient hardware accelerators therefore represents the most viable approach in terms of energy efficiency, especially with respect to in-sensing neural computing. The result is a novel quantized Neural Network model, or Hybrid Neural Network, able to achieve accuracies as high as 99% when classifying daily human activities from MEMS inertial sensors. Its custom ultra-low power hardware circuitry for the real-time execution of the Hybrid Neural Network is presented with CMOS technologies and implemented with a Field-programmable gate array, including associated demo.
One year before graduating from the Polytechnic University of Milan in 1992, Danilo PAU joined STMicroelectronics, where he worked on HDMAC and MPEG2 video memory reduction, video coding, embedded graphics, and computer vision. Today, his work focuses on developing solutions for deep learning tools and applications.
Danilo has been an IEEE Fellow since 2019, serving as Industry Ambassador coordinator for IEEE Region 8 South Europe and Member of the Machine Learning, Deep Learning and AI in the CE (MDA) Technical Stream Committee IEEE Consumer Electronics Society (CESoc).
With over 80 patents, 100 publications, 113 MPEG authored documents and 37 invited talks/seminars at various worldwide Universities and Conferences, Danilo's favorite activity remains mentoring undergraduate students, MSc engineers and PhD students from various universities in Italy, US, France and India.